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| (R) HA-2556 Data Sheet April 29, 2008 FN2477.6 57MHz, Wideband, Four Quadrant, Voltage Output Analog Multiplier The HA-2556 is a monolithic, high speed, four quadrant, analog multiplier constructed in the Intersil Dielectrically Isolated High Frequency Process. The voltage output simplifies many designs by eliminating the current-to-voltage conversion stage required for current output multipliers. The HA-2556 provides a 450V/s slew rate and maintains 52MHz and 57MHz bandwidths for the X and Y channels respectively, making it an ideal part for use in video systems. The suitability for precision video applications is demonstrated further by the Y-Channel 0.1dB gain flatness to 5.0MHz, 1.5% multiplication error, -50dB feedthrough and differential inputs with 8A bias current. The HA-2556 also has low differential gain (0.1%) and phase (0.1) errors. The HA-2556 is well suited for AGC circuits as well as mixer applications for sonar, radar, and medical imaging equipment. The HA-2556 is not limited to multiplication applications only; frequency doubling, power detection, as well as many other configurations are possible. For MIL-STD-883 compliant product consult the HA-2556/883 datasheet. Features * High Speed Voltage Output . . . . . . . . . . . . . . . . . 450V/s * Low Multiplication Error . . . . . . . . . . . . . . . . . . . . . . . 1.5% * Input Bias Currents . . . . . . . . . . . . . . . . . . . . . . . . . . .8A * 5MHz Feedthrough . . . . . . . . . . . . . . . . . . . . . . . . . -50dB * Wide Y-Channel Bandwidth . . . . . . . . . . . . . . . . . . 57MHz * Wide X-Channel Bandwidth . . . . . . . . . . . . . . . . . . 52MHz * VY 0.1dB Gain Flatness . . . . . . . . . . . . . . . . . . . . 5.0MHz * Pb-free available (RoHS compliant) Applications * Military Avionics * Missile Guidance Systems * Medical Imaging Displays * Video Mixers * Sonar AGC Processors * Radar Signal Conditioning * Voltage Controlled Amplifier * Vector Generators Ordering Information PART NUMBER HA9P2556-9 PART MARKING HA9P2556 -9 TEMP RANGE (C) -40 to +85 -40 to +85 -40 to +85 PACKAGE 16 Ld SOIC 16 Ld SOIC (Pb-free) PKG DWG. # M16.3 M16.3 Functional Block Diagram VX+ + VXHA-2556 VOUT A X HA9P2556-9Z HA9P2556 -9Z (Note) HA1-2556-9 HA1-2556-9 - 16 Ld CERDIP F16.3 NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1/SF + + Y Z VZ+ + VY+ - - VY- VZ- NOTE: The transfer equation for the HA-2556 is: (VX+ -VX-) (VY+ -VY-) = SF (VZ+ -VZ-), where SF = Scale Factor = 5V; VX, VY, VZ = Differential Inputs. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 1998, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-2556 Pinout HA-2556 (16 LD CERDIP, SOIC) TOP VIEW GND 1 VREF 2 VYIOB 3 VYIOA 4 VY+ 5 VY - 6 V- 7 VOUT 8 Y X REF 16 VXIOA 15 VXIOB 14 NC 13 VX+ 12 VX11 V+ + - Z 10 VZ 9 VZ + 2 FN2477.6 April 29, 2008 HA-2556 Absolute Maximum Ratings Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . 35V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Thermal Information Thermal Resistance (Typical, Note 1) JA (C/W) JC (C/W) 16 Ld SOIC Package . . . . . . . . . . . . . . 90 N/A 16 Ld CERDIP Package. . . . . . . . . . . . 75 20 Maximum Junction Temperature (Ceramic Package) . . . . . . . +175C Maximum Junction Temperature (Plastic Packages) . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . -65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications PARAMETER MULTIPLIER PERFORMANCE Transfer Function VSUPPLY = 15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified. TEST CONDITIONS TEMP (C) MIN (Note 10) TYP MAX (Note 10) UNITS ( V X+ - V X- ) x ( V Y+ - V Y- ) V OUT = A ------------------------------------------------------------------- - ( V Z+ - V Z- ) 5 (Note 2) 25 Full 1.5 3.0 0.003 5 0.02 0.05 0.2 3 6 0.25 0.5 % % %/C V % % % Multiplication Error Multiplication Error Drift Scale Factor Linearity Error VX, VY = 3V, Full Scale = 3V VX, VY = 4V, Full Scale = 4V VX, VY = 5V, Full Scale = 5V AC CHARACTERISTICS Small Signal Bandwidth (-3dB) VY = 200mVP-P, VX = 5V VX = 200mVP-P, VY = 5V Full Power Bandwidth (-3dB) Slew Rate Rise Time Overshoot Settling Time Differential Gain Differential Phase VY 0.1dB Gain Flatness VX 0.1dB Gain Flatness THD + N 1MHz Feedthrough 5MHz Feedthrough SIGNAL INPUT (VX, VY, VZ) Input Offset Voltage 10VP-P (Note 5) (Note 6) (Note 6) To 0.1%, (Note 5) (Note 3) (Note 3) 200mVP-P, VX = 5V, 200mVP-P, VY = 5V, (Note 4) 200mVP-P, Other Channel Nulled 200mVP-P, Other Channel Nulled Full 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 420 4.0 2.0 - 57 52 32 450 8 20 100 0.1 0.1 5.0 4.0 0.03 -65 -50 0.2 0.3 - MHz MHz MHz V/s ns % ns % MHz MHz % dB dB 25 Full - 3 8 45 8 12 15 25 15 20 mV mV V/C A A Average Offset Voltage Drift Input Bias Current Full 25 Full 3 FN2477.6 April 29, 2008 HA-2556 Electrical Specifications PARAMETER Input Offset Current VSUPPLY = 15V, RF = 50, RL = 1k, CL = 20pF, Unless Otherwise Specified. (Continued) TEST CONDITIONS TEMP (C) 25 Full Differential Input Resistance Full Scale Differential Input (VX, VY, VZ) VX Common Mode Range VY Common Mode Range CMRR Within Common Mode Range Voltage Noise (Note 8) f = 1kHz f = 100kHz OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Resistance POWER SUPPLY +PSRR -PSRR Supply Current NOTES: 2. Error is percent of full scale, 1% = 50mV. 3. f = 4.43MHz, VY = 300mVP-P, 0VDC to 1VDC offset, VX = 5V. 4. f = 10kHz, VY = 1VRMS, VX = 5V. 5. VOUT = 0V to 4V. 6. VOUT = 0mV to 100mV. 7. VS = 12V to 15V. 8. VX = VY = 0V. 9. VX = 5.5V, VY = 5.5V. 10. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Note 7) (Note 7) Full Full Full 65 45 80 55 18 22 dB dB mA (Note 9) Full Full 25 5.0 20 6.05 45 0.7 1.0 V mA 25 25 25 25 Full 25 25 MIN (Note 10) 5 65 TYP 0.5 1.0 1 10 +9, -10 78 150 40 MAX (Note 10) 2 3 UNITS A A M V V V dB nV/Hz nV/Hz 4 FN2477.6 April 29, 2008 HA-2556 Simplified Schematic V+ VBIAS VBIAS VCC VX+ VX- VY+ VYVZ + OUT REF + VZ - - VXIO A VXIOB VYIO A GND VYIOB V- Application Information Operation at Reduced Supply Voltages The HA-2556 will operate over a range of supply voltages, 5V to 15V. Use of supply voltages below 12V will reduce input and output voltage ranges. See "Typical Performance Curves" on page 12 for more information. This results in Equation 1, where X, Y and Z are high impedance differential inputs. 1 NC NC NC VY+ 2 3 4 5 6 -15V 7 8 50 1k + + 16 REF 15 14 NC NC NC VX+ Offset Adjustment X-Channel and Y-Channel offset voltages may be nulled by using a 20k potentiometer between the VYIO or VXIO adjust pin A and B and connecting the wiper to V-. Reducing the channel offset voltage, will reduce AC feedthrough and improve the multiplication error. Output offset voltage can also be nulled by connecting VZ- to the wiper of a potentiometer which is tied between V+ and V-. - 13 12 11 - + -+ 10 9 +15V VZ VZ + VOUT 20pF Capacitive Drive Capability When driving capacitive loads >20pF a 50 resistor should be connected between VOUT and VZ+, using VZ+ as the output (see Figure 1). This will prevent the multiplier from going unstable and reduce gain peaking at high frequencies. The 50 resistor will dampen the resonance formed with the capacitive load and the inductance of the output at Pin 8. Gain accuracy will be maintained because the resistor is inside the feedback loop. FIGURE 1. DRIVING CAPACITIVE LOAD XxY V OUT = Z = ------------5 (EQ. 1) Theory of Operation The HA-2556 creates an output voltage that is the product of the X and Y input voltages divided by a constant scale factor of 5V. The resulting output has the correct polarity in each of the four quadrants defined by the combinations of positive and negative X and Y inputs. The Z stage provides the means for negative feedback (in the multiplier configuration) and an input for summation into the output. To accomplish this the differential input voltages are first converted into differential currents by the X and Y input transconductance stages. The currents are then scaled by a constant reference and combined in the multiplier core. The multiplier core is a basic Gilbert Cell that produces a differential output current proportional to the product of X and Y input signal currents. This current becomes the output for the HA-2557. The HA-2556 takes the output current of the core and feeds it to a transimpedance amplifier, that converts the current to a voltage. In the multiplier configuration, negative feedback is provided with the Z transconductance amplifier by connecting VOUT to the Z input. The Z stage converts VOUT to a current which is subtracted from the multiplier core before being applied to the high gain transimpedance amp. The Z stage, by virtue of it's similarity to the X and Y stages, also cancels 5 FN2477.6 April 29, 2008 HA-2556 second order errors introduced by the dependence of VBE on collector current in the X and Y stages. The purpose of the reference circuit is to provide a stable current, used in setting the scale factor to 5V. This is achieved with a bandgap reference circuit to produce a temperature stable voltage of 1.2V which is forced across a NiCr resistor. Slight adjustments to scale factor may be possible by overriding the internal reference with the VREF pin. The scale factor is used to maintain the output of the multiplier within the normal operating range of 5V when full scale inputs are applied. Signals A and B are input to the multiplier and the signal W is the result. By substituting the signal values into the Balance equation yields Equation 5: (A) x (B) = 5(W) (EQ. 5) And solving for W yields Equation 6: AxB W = ------------5 (EQ. 6) The Balance Concept The open loop transfer for the HA-2556 is calculated using Equation 2: ( V X+ -V X- ) x ( V Y+ - V Y- ) V OUT = A ------------------------------------------------------------------ - ( V Z+ -V Z- ) 5V (EQ. 2) Notice that the output (W) enters the equation in the feedback to the Z stage. The Balance Equation does not test for stability, so remember that you must provide negative feedback. In the multiplier configuration, the feedback path is connected to VZ+ input, not VZ-. This is due to the inversion that takes place at the summing node just prior to the output amplifier. Feedback is not restricted to the Z stage, other feedback paths are possible as in the Divider Configuration shown in Figure 3. VX+ + HA-2556 VOUT A X + 1/5V VY+ B + Y Z VZ + + W where; A= Output Amplifier Open Loop Gain Differential Input Voltages VX, VY, VZ = - VX- 5V = Fixed Scaled Factor An understanding of the transfer function can be gained by assuming that the open loop gain, A, of the output amplifier is infinite. With this assumption, any value of VOUT can be generated with an infinitesimally small value for the terms within the brackets. Therefore we can write Equation 3: ( V X+ -V X- ) x ( V Y+ -V Y- ) 0 = ---------------------------------------------------------------- - ( V Z+ -V Z- ) 5V (EQ. 3) - - - VY- VZ - A FIGURE 3. DIVIDER Inserting the signal values A, B and W into the Balance Equation for the divider configuration yields Equation 7: ( -W ) ( B ) = 5V x ( -A ) (EQ. 7) which simplifies to Equation 4: ( V X+ -V X- ) x ( V Y+ -V Y- ) = 5V ( V Z+ -V Z- ) (EQ. 4) Solving for W yields Equation 8: 5A W = -----B (EQ. 8) This form of the transfer equation provides a useful tool to analyze multiplier application circuits and will be called the Balance Concept. Typical Applications Let's first examine the Balance Concept as it applies to the standard multiplier configuration (Figure 2). VX+ A VX1/5V VY+ B VY+ Y + HA-2556 VOUT A X + Z VZ + + W Notice that, in the divider configuration, signal B must remain 0 (positive) for the feedback to be negative. If signal B is negative, then it will be multiplied by the VX- input to produce positive feedback and the output will swing into the rail. Signals may be applied to more than one input at a time as in the Squaring configuration in Figure 4: Here the Balance equation will appear as Equation 9: (A) x (A) = 5(W) (EQ. 9) - - - - VZ - FIGURE 2. MULTIPLIER 6 FN2477.6 April 29, 2008 HA-2556 VX+ A VX+ HA-2556 Square Root A VOUT W - X + 1/5V VY+ + VY Y - Z VZ + + - - VZ - FIGURE 4. SQUARE The Square Root function can serve as a precision/wide bandwidth compander for audio or video applications. A compander improves the Signal-to-Noise Ratio for your system by amplifying low level signals while attenuating or compressing large signals (refer to Figure 17; X0.5 curve). This provides for better low level signal immunity to noise during transmission. On the receiving end, the original signal may be reconstructed with the standard Square function. Which simplifies to Equation 10: A2 W = -----5 (EQ. 10) Communications The Multiplier configuration has applications in AM Signal Generation, Synchronous AM Detection and Phase Detection to mention a few. These circuit configurations are shown in Figures 6, 7 and 8. The HA-2556 is particularly useful in applications that require high speed signals on all inputs. ACos() AUDIO VX+ + VXHA-2556 VOUT A X + Z VZ + + W The last basic configuration is the Square Root as shown in Figure 5. Here feedback is provided to both X and Y inputs. VX+ + VXHA-2556 VOUT A X + Z VZ + + W - - 1/5V VY+ + Y - 1/5V CCos(C) A CARRIER VYVY+ + Y - - - VY- VZ - - - VZ - FIGURE 5. SQUARE ROOT (FOR A > 0) The Balance equation takes the form of Equation 11: ( W ) x ( -W ) = 5 ( -A ) (EQ. 11) AC W = -------- ( Cos ( C - A ) + Cos ( C + A ) ) 10 FIGURE 6. AM SIGNAL GENERATION AM SIGNAL VX+ + VX- HA-2556 VOUT A W Which equates to Equation 12: W= 5A (EQ. 12) CARRIER - X + Z VZ+ + 1/5V VY+ + Y - The four basic configurations (Multiply, Divide, Square and Square Root) as well as variations of these basic circuits have many uses. - - VY- VZ- Frequency Doubler For example, if ACos() is substituted for signal A in the Square function, then it becomes a Frequency Doubler and the equation takes the form of Equation 13: ( ACos ( ) ) x ( ACos ( ) ) = 5 ( W ) (EQ. 13) LIKE THE FREQUENCY DOUBLER YOU GET AUDIO CENTERED AT DC AND 2FC. FIGURE 7. SYNCHRONOUS AM DETECTION ACos() VX+ + VX- HA-2556 VOUT A X + 1/5V Z VZ + + W - And using some trigonometric identities gives the result in Equation 14: ACos(+) VY+ + Y W = ------ ( 1 + Cos ( 2 ) ) 10 A2 (EQ. 14) VY- - - A2 W = ------ ( Cos ( ) + Cos ( 2 + ) ) 10 FIGURE 8. PHASE DETECTION VZ - DC COMPONENT IS PROPORTIONAL TO COS(f) 7 FN2477.6 April 29, 2008 HA-2556 Each input X, Y and Z have similar wide bandwidth and input characteristics. This is unlike earlier products where one input was dedicated to a slow moving control function as is required for Automatic Gain Control. The HA-2556 is versatile enough for both. Although the X and Y inputs have similar AC characteristics, they are not the same. The designer should consider input parameters such as small signal bandwidth, AC feedthrough and 0.1dB gain flatness to get the most performance from the HA-2556. The Y-Channel is the faster of the two inputs with a small signal bandwidth of typically 57MHz vs 52MHz for the X-Channel. Therefore in AM Signal Generation, the best performance will be obtained with the Carrier applied to the Y-Channel and the modulation signal (lower frequency) applied to the X-Channel. 100MHz of bandwidth, but its scale factor is fixed and does not have an output amplifier for additional scaling. Fortunately, the circuit in Figure 10 provides an output current that can be scaled with the value of RCONVERT and provides an output impedance of typically 1M. IOUT then becomes Equation 16: AxB 1 I OUT = ------------- x ------------------------------5 R CONVERT (EQ. 16) Video Fader The Video Fader circuit provides a unique function. Here Channel B is applied to the minus Z input in addition to the minus Y input. In this way, the function in Figure 11 is generated. VMIX will control the percentage of Channel A and Channel B that are mixed together to produce a resulting video image or other signal. A VX+ + VXHA-2556 VOUT RCONVERT A X + 1/5V B VY+ + Y Z VZ + + IOUT Scale Factor Control The HA-2556 is able to operate over a wide supply voltage range 5V to 17.5V. The 5V range is particularly useful in video applications. At 5V the input voltage range is reduced to 1.4V. The output cannot reach its full scale value with this restricted input, so it may become necessary to modify the scale factor. Adjusting the scale factor may also be useful when the input signal itself is restricted to a small portion of the full scale level. Here, we can make use of the high gain output amplifier by adding external gain resistors. Generating the maximum output possible for a given input signal will improve the Signal-to-Noise Ratio and Dynamic Range of the system. For example, let's assume that the input signals are 1VPEAK each then, the maximum output for the HA-2556 will be 200mV. (1V x 1V)/(5V) = 200mV. It would be nice to have the output at the same full scale as our input, so let's add a gain of 5 as shown in Figure 9. VX+ A VX+ HA-2556 VOUT A X + 1/5V VY+ B VY+ Y Z VZ + + 1k RF W - - - - VY- VZ - FIGURE 10. CURRENT OUTPUT The Balance equation looks like Equation 17: ( V MIX ) x ( ChA - ChB ) = 5 ( V OUT - ChB ) (EQ. 17) Which simplifies to Equation 18: V MIX V OUT = ChB + ------------- ( ChA - ChB ) 5 (EQ. 18) - When VMIX is 0V the equation becomes VOUT = ChB and ChA is removed, conversely when VMIX is 5V the equation becomes VOUT = ChA eliminating ChB. For VMIX values 0V VMIX 5V the output is a blend of ChA and ChB. 1 16 REF 15 14 + - - - NC NC NC VX + VZ - RF ExternalGain = ------- + 1 RG FIGURE 9. EXTERNAL GAIN OF 5 250 RG NC NC NC ChA ChB VY+ VY-15V 2 3 4 5 6 7 8 - 13 12 11 VMIX (0V TO 5V) + - One caveat is that the output bandwidth will also drop by this factor of 5. The multiplier equation then becomes Equation 15: 5AB W = ----------- = A x B 5 (EQ. 15) + -+ 10 9 +15V VZ VZ + VOUT 50 FIGURE 11. VIDEO FADER Current Output Another useful circuit for low voltage applications allows the user to convert the voltage output of the HA2556 to an output current. The HA-2557 is a current output version offering Other Applications As previously shown, a function may contain several different operators at the same time and use only one FN2477.6 April 29, 2008 8 HA-2556 HA-2556. Some other possible multi-operator functions are shown in Figures 12, 13 and 14. Of course the HA-2556 is also well suited to standard multiplier applications such as Automatic Gain Control and Voltage Controlled Amplifier. A VX+ + 5k B 5k VYVXVY+ + HA-2556 W = 5(A2-B2) A X + Y Z VZ + + 5k NC NC NC VZ 5k VY+ 1 2 3 4 5 6 Y X control input. At DC the circuit is an integrator automatically compensating for Offset and other constant error terms. This multiplier has the advantage over other AGC circuits, in that the signal bandwidth is not affected by the control signal gain adjustment. HA-2556 16 NC 15 NC 14 NC 13 12 11 V+ - REF 1/5V - - - FIGURE 12. DIFFERENCE OF SQUARES V95k R1 5k VXVX+ 1/5V A VY+ + Y R2 + HA-2556 VOUT A X + Z VZ + + B VZ 5k A-B W = 100 A 7 8 + - Z 10 9 VOUT - 50 10k 0.1F - 1N914 - 10k +15V 20k 0.01F + HA-5127 5.6V VY- - R1 and R2 set scale to 1V/%, other scale factors possible. For A 0V. FIGURE 13. PERCENTAGE DEVIATION 0.1F VX+ HA-2556 VOUT A X + A-B W = 10 B + A FIGURE 15. AUTOMATIC GAIN CONTROL - VX+ 1/5V VY+ + Voltage Controlled Amplifier Z VZ + + B A VZ - Y - 5k 5k - VY- A wide range of gain adjustment is available with the Voltage Controlled Amplifier configuration shown in Figure 16. Here the gain of the HFA0002 can be swept from 20V/V to a gain of almost 1000V/V with a DC voltage from 0V to 5V. Wave Shaping Circuits Wave shaping or curve fitting is another class of application for the analog multiplier. For example, where a nonlinear sensor requires corrective curve fitting to improve linearity the HA-2556 can provide nonintegral powers in the range of 1 to 2 or nonintegral roots in the range of 0.5 to 1.0 (refer to "References" on page 11). This effect is displayed in Figure 17. FIGURE 14. DIFFERENCE DIVIDED BY SUM S (For A + B 0V) Automatic Gain Control Figure 15 shows the HA-2556 configured in an Automatic Gain Control or AGC application. The HA-5127 low noise amplifier provides the gain control signal to the X input. This control signal sets the peak output voltage of the multiplier to match the preset reference level. The feedback network around the HA-5127 provides a response time adjustment. High frequency changes in the peak are rejected as noise or the desired signal to be transmitted. These signals do not indicate a change in the average peak value and therefore no gain adjustment is needed. Lower frequency changes in the peak value are given a gain of -1 for feedback to the 9 FN2477.6 April 29, 2008 HA-2556 . HA-2556 1 NC 2 NC 3 NC 4 5 6 V- 7 8 Y X Figure 18 compares the function VOUT = VIN0.7 to the approximation VOUT = 0.5VIN0.5 + 0.5VIN. 16 NC 1.0 REF 15 NC 14 NC OUTPUT (V) 13 VX + (VGAIN) 12 11 V+ 0.8 X0.7 0.6 0.5X0.5+ 0.5X 0.4 + - 10 Z 9 0.2 X 0 500 VIN 5k 0 0.2 0.4 0.6 0.8 1.0 VOUT + HFA0002 - INPUT (V) FIGURE 18. COMPARE APPROXIMATION TO NONINTEGRAL ROOT FIGURE 16. VOLTAGE CONTROLLED AMPLIFIER . 1.0 X0.5 X0.7 0.8 OUTPUT (V) This function can be easily built using an HA-2556 and a potentiometer for easy adjustment as shown in Figures 19 and 20. If a fixed nonintegral power is desired, the circuit shown in Figure 21 eliminates the need for the output buffer amp. These circuits approximate the function VINM where M is the desired nonintegral power or root. HA-2556 1 16 NC REF 15 NC 14 NC + + Y X 0.6 0.4 X1.5 0.2 X2 NC NC NC 2 3 4 5 13 0 - 12 11 V+ 0 0.2 0.4 0.6 INPUT (V) 0.8 1.0 V- 6 7 8 + FIGURE 17. EFFECT OF NONINTEGRAL POWERS/ROOTS - + Z 10 9 1- VIN - A multiplier can't do nonintegral roots "exactly", but it can yield a close approximation. We can approximate nonintegral roots with Equations 19 and 20 of the form: V O = ( 1 - )V IN 2 + V IN (EQ. 19) 0.5 M 1.0 0V VIN 1V + - VOUT HA-5127 FIGURE 19. NONINTEGRAL ROOTS - ADJUSTABLE V O = ( 1 - )V IN 1/2 + V IN (EQ. 20) 10 FN2477.6 April 29, 2008 HA-2556 HA-2556 1 NC 2 NC 3 NC 4 5 6 V7 8 + Y Sine Function Generators 16 NC 15 NC 14 NC + X REF VIN 13 Similar functions can be formulated to approximate a SINE function converter as shown in Figure 22. With a linearly changing (0V to 5V) input the output will follow 0 to 90 of a sine function (0V to 5V) output. This configuration is theoretically capable of 2.1% maximum error to full scale. By adding a second HA-2556 to the circuit an improved fit may be achieved with a theoretical maximum error of 0.5% as shown in Figure 23. Figure 23 has the added benefit that it will work for positive and negative input signals. This makes a convenient triangle (5V input) to sine wave (5V output) converter. VOUT HA-2556 - 12 11 V+ + - + Z 10 9 1- - 1.0 M 2.0 0V VIN 1V + HA-5127 NC NC HA-2556 1 NC NC NC 2 3 4 5 6 + Y - 1 2 3 4 5 6 VIN VOUT V7 8 + Y 16 NC REF 15 NC 14 NC + X FIGURE 20. NONINTEGRAL POWERS - ADJUSTABLE R2 470 R6 470 16 NC REF 15 NC 14 NC + X VIN NC 13 - 12 11 V+ + - + Z 10 9 R1 262 R5 1410 13 - - 12 11 +Z V+ R1 R3 , 644 R2 R4, 1k VOUT V- 7 8 + 10 9 R3 FIGURE 22. SINE-FUNCTION GENERATOR 1.2 M 2.0 0V VIN 1V R4 References [1] Pacifico Cofrancesco, "RF Mixers and Modulators made with a Monolithic Four-Quadrant Multiplier" Microwave Journal, December 1991 pg. 58 - 70. [2] Richard Goller, "IC Generates Nonintegral Roots" Electronic Design, December 3, 1992. ( 1 - 0.1284V IN ) V IN V OUT = V IN -------------------------------------------------- 5sin -- --------- 2 5 ( 0.6082 - 0.05V IN ) (EQ. 23) FIGURE 21. NONINTEGRAL POWERS - FIXED R3 R2 1 R3 2 -V OUT = -- ------ + 1 V IN + ------ + 1 -------------------- V IN 5 R4 R4 R 1 + R 2 (EQ. 21) Setting: 1 R3 -1 - = -- ------ + 1 5 R4 R3 R2 = ------ + 1 -------------------- R4 R 1 + R 2 (EQ. 22) Values for to give a desired M root or power are as follows: ROOTS - FIGURE 19 M 0.5 0.6 0.7 0.8 0.9 1.0 0 POWERS - FIGURE 20 M 1.0 1.2 1.4 1.6 1.8 2.0 1 for; 0V VIN 5V where: R4 ; 0.6082 = -------------------R3 + R4 Max Theoretical Error = 2.1%FS R2 5 ( 0.1284 ) = -------------------R1 + R2 0.25 0.50 0.70 0.85 1 0.75 0.50 0.30 0.15 0 R6 5 ( 0.05 ) = -------------------R5 + R6 5V IN - 0.05494V IN V IN V OUT = ------------------------------------------------------------------ 5sin -- --------- 2 5 2 3.18167 + 0.0177919V IN 3 (EQ. 24) (EQ. 25) for; -5V VIN 5V Max Theoretical Error = 0.5%FS 11 FN2477.6 April 29, 2008 HA-2556 23.1k X+ 71.5k VOUT VIN X+ XVOUT 10k X- VOUT 5.71k Z+ Z10k HA-2556 Y+ Y- HA-2556 Y+ YZ+ Z- FIGURE 23. BIPOLAR SINE-FUNCTION GENERATOR Typical Performance Curves 1.0 1.5 Y = -4 1.0 0.5 ERROR (%FS) ERROR (%FS) Y=0 0 Y=1 Y=3 -0.5 Y=4 Y=5 -1 -6 -4 -2 0 X INPUT (V) 2 4 6 0.5 Y = -2 Y = -1 0 Y=0 Y = -5 Y = -3 -0.5 Y=2 -1.0 -1.5 -6 -4 -2 0 X INPUT (V) 2 4 6 FIGURE 24. X-CHANNEL MULTIPLIER ERROR FIGURE 25. X-CHANNEL MULTIPLIER ERROR 1.5 X = -3 X = -2 1.0 X = -4 ERROR (%FS) ERROR (%FS) 0.5 1.0 0.5 X=0 0 X=5 -0.5 X=1 X=2 -1.0 X=4 X=3 X = -1 X=0 0 X = -5 -0.5 -1.0 -6 -4 -2 0 Y INPUT (V) 2 4 6 -1.5 -6 -4 -2 0 Y INPUT (V) 2 4 6 FIGURE 26. Y-CHANNEL MULTIPLIER ERROR FIGURE 27. Y-CHANNEL MULTIPLIER ERROR 12 FN2477.6 April 29, 2008 HA-2556 Typical Performance Curves 8 (Continued) 200 4 OUTPUT (mV) OUTPUT (V) 100 0 0 -4 VX = 4V PULSE VY = 5VDC -8 0ns 500ns 2V/DIV; 100ns/DIV 1s -100 VY = 100mV PULSE VX = 5VDC 0ns 250ns 50mV/DIV; 50ns/DIV 500ns -200 FIGURE 28. LARGE SIGNAL RESPONSE FIGURE 29. SMALL SIGNAL RESPONSE 4 3 2 GAIN (dB) Y-CHANNEL = 10VP-P X-CHANNEL = 5VDC 4 3 2 GAIN (dB) 1 0 -1 -2 -3 -3dB AT 32.5MHz -4 10k Y-CHANNEL = 4VP-P X-CHANNEL = 5VDC 1 0 -1 -2 -3 -4 10k 100k 1M FREQUENCY (Hz) 10M 100k 1M FREQUENCY (Hz) 10M FIGURE 30. Y-CHANNEL FULL POWER BANDWIDTH FIGURE 31. Y-CHANNEL FULL POWER BANDWIDTH 4 3 2 GAIN (dB) X-CHANNEL = 10VP-P Y-CHANNEL = 5VDC 4 3 2 GAIN (dB) 1 0 -1 -2 -3 -4 X-CHANNEL = 4VP-P Y-CHANNEL = 5VDC 1 0 -1 -2 -3 -4 10k 100k 1M FREQUENCY (Hz) 10M 10k 100k 1M FREQUENCY (Hz) 10M FIGURE 32. X-CHANNEL FULL POWER BANDWIDTH FIGURE 33. X-CHANNEL FULL POWER BANDWIDTH 13 FN2477.6 April 29, 2008 HA-2556 Typical Performance Curves 0 VX = 5VDC -6 GAIN (dB) GAIN (dB) VX = 2VDC -6 VY = 2VDC -12 (Continued) 0 VY = 5VDC -12 -18 -18 VY = 0.5VDC -24 10k VX = 0.5VDC 100k 1M FREQUENCY (Hz) VY = 200mVP-P 10M 100M -24 10k 100k 1M FREQUENCY (Hz) VX = 200mVP-P 10M 100M FIGURE 34. Y-CHANNEL BANDWIDTH vs X-CHANNEL FIGURE 35. X-CHANNEL BANDWIDTH vs Y-CHANNEL 0 -10 -20 -30 CMRR (dB) -40 -50 -60 -70 -80 5MHz -38.8dB CMRR (dB) VY +, VY- = 200mVRMS VX = 5VDC 0 -10 -20 -30 -40 -50 -60 -70 -80 5MHz -26.2dB VX +, VX - = 200mVRMS VY = 5VDC 10k 100k 1M FREQUENCY (Hz) 10M 100M 10k 100k 1M FREQUENCY (Hz) 10M 100M FIGURE 36. Y-CHANNEL CMRR vs FREQUENCY FIGURE 37. X-CHANNEL CMRR vs FREQUENCY 0 -10 -20 FEEDTHROUGH (dB) -30 -40 -50 -60 -70 -80 -52.6dB AT 5MHz VX = 200mVP-P VY = NULLED FEEDTHROUGH (dB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -49dB AT 5MHz VY = 200mVP-P VX = NULLED 10k 100k 1M FREQUENCY (Hz) 10M 100M 10k 100k 1M FREQUENCY (Hz) 10M 100M FIGURE 38. FEEDTHROUGH vs FREQUENCY FIGURE 39. FEEDTHROUGH vs FREQUENCY 14 FN2477.6 April 29, 2008 HA-2556 Typical Performance Curves 8 7 OFFSET VOLTAGE (mV) BIAS CURRENT (A) 0 50 100 150 6 5 4 3 2 1 |VIOY| 0 -100 -50 |VIOX| |VIOZ| (Continued) 14 13 12 11 10 9 8 7 6 5 4 -100 -50 0 50 100 150 TEMPERATURE (C) TEMPERATURE (C) FIGURE 40. OFFSET VOLTAGE vs TEMPERATURE FIGURE 41. INPUT BIAS CURRENT (VX, VY, VZ) vs TEMPERATURE 2.0 1.5 1.0 0.5 0 -0.5 -1 -100 6 SCALE FACTOR ERROR (%) INPUT VOLTAGE RANGE (V) 5 X INPUT Y INPUT 4 3 2 1 -50 0 50 100 150 4 6 8 10 12 14 16 TEMPERATURE (C) SUPPLY VOLTAGE (V) FIGURE 42. SCALE FACTOR ERROR vs TEMPERATURE FIGURE 43. INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE 15 X INPUT 10 SUPPLY CURRENT (mA) Y INPUT 5 CMR (V) 0 -5 X AND Y INPUT -10 -15 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 25 20 ICC IEE 15 10 5 0 0 5 10 SUPPLY VOLTAGE (V) 15 20 FIGURE 44. INPUT COMMON MODE RANGE vs SUPPLY VOLTAGE FIGURE 45. SUPPLY CURRENT vs SUPPLY VOLTAGE 15 FN2477.6 April 29, 2008 HA-2556 Typical Performance Curves 5.0 MAX OUTPUT VOLTAGE (V) (Continued) 4.8 4.6 4.4 4.2 100 300 500 700 RLOAD () 900 1100 FIGURE 46. OUTPUT VOLTAGE vs RLOAD Die Characteristics DIE DIMENSIONS: 71 mils x 100 mils x 19 mils METALLIZATION: Type: Al, 1% Cu Thickness: 16kA 2kA PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos) Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 2kA TRANSISTOR COUNT: 84 SUBSTRATE POTENTIAL: V- Metallization Mask Layout HA-2556 VREF GND (2) (1) VXIOA (16) VXIOB (15) VYIOB (3) VYIOA (4) VX+ (13) VY+ (5) VX(12) VY(6) V+ (11) (8) (7) V- VOUT (9) (10) VZ+ VZ- 16 FN2477.6 April 29, 2008 HA-2556 Small Outline Plastic Packages (SOIC) N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45 H 0.25(0.010) M BM M16.3 (JEDEC MS-013-AA ISSUE C) 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A L MILLIMETERS MIN 2.35 0.10 0.33 0.23 10.10 7.40 MAX 2.65 0.30 0.51 0.32 10.50 7.60 NOTES 9 3 4 5 6 7 8 Rev. 1 6/05 MIN 0.0926 0.0040 0.013 0.0091 0.3977 0.2914 MAX 0.1043 0.0118 0.0200 0.0125 0.4133 0.2992 A1 B C D E A1 0.10(0.004) C e H h L N 0.050 BSC 0.394 0.010 0.016 16 0 8 0.419 0.029 0.050 1.27 BSC 10.00 0.25 0.40 16 0 10.65 0.75 1.27 e B 0.25(0.010) M C AM BS NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 17 FN2477.6 April 29, 2008 HA-2556 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) c1 -A-DBASE METAL b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A) 16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c c1 MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.840 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 21.34 7.87 2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 16 5.08 1.52 105o 0.38 0.76 0.25 0.038 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94 E eA D E e eA eA/2 L Q S1 e DS eA/2 c 0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 16 0.200 0.060 105o 0.015 0.030 0.010 0.0015 aaa M C A - B S D S NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH. aaa bbb ccc M N All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 18 FN2477.6 April 29, 2008 |
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